In the process of PCB board design and manufacture, engineers should not only prevent PCB board from accidents during manufacturing and processing, but also avoid design mistakes.

Today, banerjie summarized and analyzed common PCB problems, hoping to bring some help to your design and production work. The price is charged online on the jetpack website. If you want to learn more about PCB and SMT, please pay attention to the jetpack PCB!!!

1. PCB design requirements of the board are not high, so use thin thread and automatic cloth.

Reason: automatic wiring must occupy larger PCB area, at the same time, many times more than the manual wiring hole, large in batch products, PCB manufacturer price considering the factors in addition to business factors, is the line width and number of holes, which affect the yield of PCB and the consumption of bit number, save the cost of supplier, also give the price to find the reason.

2. The system is powered by 220V, so don’t care about power consumption!

Reason: the low-power design is not only to save electricity, but also to reduce the cost of power supply module and cooling system, as well as the interference of electromagnetic radiation and thermal noise due to the reduction of current. As the temperature of the device decreases, the life of the device increases correspondingly (for every 10 degree increase in the operating temperature of the semiconductor device, the life is shortened by half).

3. These bus signals are all pulled with resistance, which makes me feel relieved.

Reason: there are many reasons why a signal needs to be pulled up and down, but not all of them. Pull resistance to pull up and down a single input signal, the current is below a few microamps, but a driven signal, and the current of milliamperes, now the system is often the 32-bit address data, there may be 244/245 after isolation of bus and other signal, are pulled, a few watts of power consumption on the resistance.

4. How to deal with the unused I/O ports of CPU and FPGA? Leave it empty for now, and we’ll see

Reason: if the unused I/O port is suspended, a little interference from the outside may become the input signal of repeated oscillation, while the power consumption of MOS device basically depends on the number of gate circuit flips. If you pull it up, each pin will also have a microampere-level current, so the best thing to do is to set it to the output (of course, no other driven signals can be connected outside).

There’s so much left in this FPGA to play with.

Comments: the power consumption of FGPA is directly proportional to the number of triggers used and the number of flips, so the power consumption of the same type of FPGA may differ by 100 times in different circuits at different moments. Minimizing the number of flip – flops is the fundamental way to reduce the power consumption of FPGA.

Small details do not lead to big mistakes, but should also pay more attention! Correct bad PCB design habits!