Then I’ll find out why. I’ll look at the board. Want to want to go, should be no problem! Then go into meditation and sleep at night thinking about it. The next day, suddenly thought of a problem, FLASH is not as long also have a problem.
To solve the problem
There’s no reason FLASH should be as slow as it is. The SDRAM is parallel with FLASH. Although the SDRAM is equidistant, it integrates a FLASH. The FLASH end is not equidistant, which leads to an extra set of unequal lines on the SDRAM end for no reason.
In PCB design, sometimes the system cannot run. In particular, DDR memory, if you don’t have the rules to do the same length, it doesn’t matter how good you draw it. For high frequency signals, data must be the same length because of timing problems. Normally slow. Like FLASH, as long as close, unequal length is also ok. Because the line is short and the speed is not high. Usually straight connect can. However, not all cases are like this. As a senior PCB designer who has been involved in PCB design industry for more than ten years, the founder of wolong association, and a community operator of thousands of electronics and IT professionals, I have encountered a problem.
I have a problem, FLASH is not long can make the product run, let’s see what happened?
Here’s the thing. This project is not really high-speed, just a SDRAM with a FLASH and a main chip. However, FLASH and SDRAM share data line, address line, that is, parallel. As a senior PCB designer in PCB design industry for more than ten years, he is the founder of wolong club, and a community operator of thousands of masters. Captain Shonway thinks it’s a piece of cake and doesn’t take it seriously.
SDRAM data line, address line cloth as long, get it done, then FLASH, close to the main control chip, directly connected, FLASH, do not have to wait so long trouble. It’s done. The board is out and done.
Hardware engineer debugging, testing. Found that sometimes can, sometimes read the data will fall, die. What happened? Then look at the software is not a problem, looking for the same problem. I also panic, is my drawing of the board has a problem, should not ah, so simple will make a mistake?
That should be the question. That’ll have to change the board, luckily! The software and hardware in the project are not perfect in one version, but still need to be modified and revised. So I changed it a little bit in the revision, making it equally long on both sides of SDRAM and FLASH. Change back to do version, debugging, no problem.
For high-speed storage signals, why equal length? It is to make the data line reach the receiving end at the same time in the transmission process. In addition to time consistency, in fact in impedance matching, environment and so on, is consistent. Original today headline/fly chat: wolong IT technology. In this case, at the SDRAM end even though the line is the same length, the transmission time is probably the same. However, the parallel line to FLASH is not the same length, which will lead to the impedance change at the SDRAM end, the reflection factor is different, because the branching line is not the same length, the reflection here, the impedance will be different. And that ultimately leads to instability.