High speed PCB, line is more than just connecting two points. As a qualified engineer, it is including resistance, capacitance and inductance of the hybrid knowledge carrier. During transmission line will be a reflection phenomenon, this must look at the size of the load end reflection depends on transmission line and load the Z Z.

Signal is reflected in the size of the reflection coefficient KR, load the reflection coefficient is: the KRL = (ZL – Z0)/(ZL + Z0), for the open load, KRL = 1; For short circuit load, KRL = 1 can be seen, for open circuit and short circuit load, 100% signal is reflected back. KRL negative suggested is the reflection of the signal with the original signal in the opposite direction. Also, the size of the signal at the source end reflection in the source end reflection coefficient: the KRS = (ZS – Z0)/(ZS + Z0).

Sets the standard output level of the drive to 0.2 V, current 24 ma, ZS about 8.3 Ω its output impedance. Set the input impedance of load ZL is larger than 100 k Ω than Z0 (about 67 Ω), the load end reflection coefficient is: the KRL = 1, the signal was 100% at the load end reflection. The source end reflection coefficient for the KRS = 0.78. Best ability net belongs to the work group, is a leading domestic electronic industry service platform, online provide components, customized procurement, PCB, BOM with single sensor, the electronic industry, such as material selection, supply chain solutions of a complete set of, meet the demands of electronic industry of small and medium-sized customers comprehensive one-stop.

The following specific analysis of the drive to create a switch from 3.5 V to 0.2 V signal reflection process.

First reflection: the drive voltage of 3.3 V, according to the principle of partial pressure of ZS and Z0, Z0 on delta V = 2.94 V, the signals produced by the source side signal voltage of V = o. 56 V. The load end reflection coefficient is 1. When the signal reaches the load end, VL = 3.5-2.94-2.94 = 2.38 V.

Second reflection: start signal source end of 0.56 V, when the signal reaches 2.94 V source side happened a second reflex, reflected voltage is: VR = KPS * delta V = 0.78 * (2.94) = 2.29 V. So the voltage of the source into a V + (2.94) = 0.56 + 2.29 = 2.29 V.

Third reflection: when arrived at the load end, the second reflection signal voltage of the load into VL = 2.38 + 2.29 + 2.29 = 2.2 V

In this impedance mismatch on a transmission line, the signal is reflected back and forth, each reflection will decrease its amplitude, until finally disappeared. The left and the right of the vertical lines represent the source side and load side voltage, slash indicates the size of the transmitted signal and the reflected signal voltage. Can also be used to signal the specific reflection process, a signal represents the source end, said a load signal. Can see after five cycles transferred to the load to descend to input below the threshold value, the signal transmission delay, generally between 6-16 ns/m, if the transmission delay tPD = 10 ns/m, and then through a 0.15 m of the transmission delay of about 1.5 ns, then the signals are transmitted in about 13.5 ns after can be considered to be effective.