For the setting of PCB wiring line width, two major issues should be considered:

One is the amount of current flowing through it. For example, for the power line, we need to consider the current flowing through the circuit when it works. If the current flowing through is large, the line should not be too thin.

Actual measurement: current carrying capacity of PCB wiring and through hole

The second is to consider the actual board factory capacity. If the current required is small (such as a signal line), it can be made thinner. Sometimes, PCB area is small and there are many devices, so we want to make the line as thin as possible, but if it is too thin, the PCB factory may not make it, or the defect rate may increase. This can be confirmed with PCB board factory. As far as I know, the line width is 0.2mm and the line spacing is 0.2mm, which can be done by general board factories. Not all lines can be made with a line width of 0.127mm. The minimum line width standard in the industry should be 0.1mm. Subsequent developments may be more detailed as the technology evolves.

As for the size of the overhole, you can also directly confirm with the board factory. After all, even if you design PCB with the overhole with small aperture, the board factory cannot do it, or it can do it, but the cost is too high. As far as I know, the outer diameter is 0.5mm and the inner diameter is 0.3mm.

1. The signal lines that need to be impedance should be set in strict accordance with the line width and line distance calculated by stacking. For example, signal lines such as radio frequency signal (conventional 50R control), important single end 50R, differential 90R, differential 100R, etc., can calculate specific line width and line distance through layering

2. The wide line spacing of the design should consider the production process capacity of the PCB production plant selected. If the wide line spacing of the design exceeds the manufacturing process capacity of the PCB manufacturer cooperating with the design, unnecessary production cost should be added, and the design cannot be produced due to the heavy weight. Generally speaking, the wide line distance of the offline line is controlled to 6/6mil, and 12mil (0.3mm) is selected as the through hole. Basically more than 80% PCB manufacturers can produce, and the production cost is the lowest. The minimum line width and spacing should be controlled to 4/4mil, and 8mil (0.2mm) should be selected for through hole, which can be basically produced by over 70% PCB manufacturers. However, the price is slightly more expensive than the first case, not too much. The minimum line width and spacing should be controlled to 3.5/3.5mil, and 8mil (0.2mm) should be selected for hole passing. At this time, some PCB manufacturers cannot produce, so the price will be more expensive. The minimum line width and spacing should be controlled to 2/2mil, and 4mil (0.1mm, at this time, HDI blind buried hole design is generally adopted, and laser over-hole is needed). At this time, most PCB manufacturers cannot produce PCB, and the price is the most expensive. Here, when setting the rule of line width and line distance, it refers to the size between the elements such as line to hole, line to line, line to pad, line to pass hole, hole to plate, etc.

3. Set rules to consider the design bottlenecks in the design files. If there is a 1mm BGA chip and the pin depth is relatively shallow, only one signal line needs to be used between the two lines of pins, and 6/6mil can be set. If the pin depth is relatively deep, 2 signal lines need to be used between the two lines of pins, then 4/4mil can be set. BGA chip with 0.65mm, generally set to 4/4mil; With 0.5mm BGA chip, the minimum line width and line spacing should be set as 3.5/3.5mil. There are 0.4mm BGA chips, and HDI design is generally required. Generally, for the design bottleneck, regional rules can be set (see the tail of the article for setting method), small points can be set for local line width and line distance, and larger rules can be set for other parts of PCB, so as to facilitate production and improve the PCB qualification rate produced.

4. It shall be set according to the density of PCB design. The density is small and the board is loose. Conventional Settings can be set according to the following steps:

1) 8/8mil, 12mil (0.3mm) is selected for hole passing.

2) 6/6mil, 12mil (0.3mm) is selected for hole passing.

3) 4/4mil, 8mil (0.2mm) is selected as the through-hole.

4) 3.5/3.5mil, and 8mil (0.2mm) was selected as the through-hole.

5) 3.5/3.5mil, 4mil (0.1mm, laser drilling) is selected for through-hole.

6) 2/2mil, 4mil (0.1mm, laser drilling) Use the Saturn tool to calculate the through-hole current, and use the revised specification IPC2152.

5. Some analysis:

1. The hole of 12mil can safely carry about 1.2a current, which is looser than 0.5a generally accepted in the industry;

2. Larger holes of 16mil, 20mil or even 24mil do not have obvious advantages in carrying current, which means that many people answer that it does not increase linearly.

Therefore, I personally recommend using 10~12mil holes to carry current, which is more efficient and convenient to design. So, is it possible to know this data and design safely? Let’s take a look at some examples of simulations:

20 12mil holes were drilled for the current of 20A, which was calculated according to the load of each hole of 1.2a. It felt very safe. But the current isn’t as pliant as you might think. It’s not evenly distributed across 20 holes. Simple DC simulation, you can see through the hole current. Some went through the hole with A current of 2.4A, others only 200mA. Of course, the design may not turn out to be too risky. Because the hole of 12mil can carry current above 2A at a temperature rise of 30 degrees. But what if the heterogeneity amplifies? It depends on the channel, the distribution, the number of holes, what if one of these holes goes 3A or even 4A? And at this time you make 25 or 30 through holes, as long as the key position of the current is not provided, the help is not very big. The reason is the same: electricity is not as obedient as you think.